Four claims, four kinds of evidence
| Claim | Means | Evidence |
|---|---|---|
| Supported | The hardware or firmware can do it | CPUID, IOMMU feature registers, firmware feature discovery |
| Enabled | Platform set-up turned it on | Initialization status, host kernel parameters |
| Selected | This guest or device uses it | The guest's report, the device's binding and grant |
| Verified | A relying party checked the evidence against its policy | A verifier's decision, with the policy it used |
The firmware's feature table (FEATURE_INFO, in a CPUID-shaped namespace) is not the same as running CPUID yourself; follow the firmware and guest paths the specifications give.
SNP extensions: discover, then verify
| Feature | What it is for | What it is not |
|---|---|---|
| Segmented RMP, RMPOPT | Laying out and speeding up RMP metadata | A weaker ownership check |
| RMP Dirty, RMPCHKD | Tracking writes to private pages | Proof that the bytes are good |
| Restricted and alternate injection | Limiting how the host signals events (#HV) | Guaranteed delivery |
| Secure TSC | A time counter the host cannot adjust | A calendar, or scheduling |
| Secure AVIC (CPU) | Interrupt virtualization for SNP guests | Device interrupts bypassing the host (§2.14.6) |
| Ciphertext hiding, RAPL disable, SMT policy | Narrowing side channels | Removing all of them |
| AES-256-XTS policy | A stronger memory-encryption mode | Authenticated encryption |
| CXL policy | Which CXL memory may be used | One rule for CXL.io, .cache and .mem |
Two compatibility checks that are easy to merge: SNP firmware 1.59 rejects ciphertext hiding while CXL memory is present (E45, from the reference), and the IOMMU relies on firmware to keep CXL devices with a .cache interface off SNP systems (48882 §2.13). Post-quantum signatures (LMS) in a boot path do not make an application's TLS post-quantum (E48).
Still the guest's job
- Its own memory safety: NX, SMEP, SMAP, W^X, shadow stacks (CET), ASLR and bounds checks work inside the guest as before (E51).
- Boot and measurement: UEFI Secure Boot authorizes what may boot; a customer's attestation policy decides what it trusts. They answer different questions (E49), as do a TPM quote and an SNP report (E50).
- Storage and networks: private RAM does not encrypt disks, backups, logs or packets. Encrypt them at their own layer.
- Updates: a security bulletin that applies is fixed by an update and a new minimum version in the verifier's policy, not by "SNP is on" (E52).
- Availability: the host can always stop running the VM.
Intel and Arm names
| Name | What it is | Closest idea here |
|---|---|---|
| TME, MKTME (Intel) | Memory encryption, one or several keys | SME, SME-MK |
| TDX, TD (Intel) | Confidential VMs managed by the TDX module | SEV-SNP guests |
| SGX (Intel) | Enclaves inside a process, not whole VMs | none |
| CCA, RME, Realm, RMM (Arm) | Confidential VMs managed by the Realm Management Monitor | SEV-SNP guests and the AMD-SP |
| GPT, GPC (Arm) | Granule protection tables and checks (Arm's RME documentation, not read for this guide) | The RMP, with a different format |
| SMMU (Arm) | Arm's IOMMU (notes) | The AMD IOMMU |
| VT-d (Intel) | Intel's IOMMU; Linux logs it as DMAR (names) | The AMD IOMMU |
| PAC, MTE, BTI (Arm) | Pointer, memory-tag and branch defences | Guest software defences, not encryption |
Port the question, not the register names: "a device must not write another guest's memory" carries over; RMP fields do not become GPT fields (E53).
Look at your own machine
A read-only look at a Linux host. It enables nothing, reads no keys, touches no MSRs and tests no isolation; what it prints is "supported" or "enabled" at most. Treat its output as private.
uname -r
grep -o -w -E 'sme|sev|sev_es|sev_snp|nx|smep|smap|pku|user_shstk|ibt' /proc/cpuinfo | sort -u
ls -l /dev/sev /dev/sev-guest /dev/tpm0 /dev/tpmrm0 2>/dev/null
grep -H . /sys/module/kvm_amd/parameters/sev* 2>/dev/null
dmesg | grep -i -E 'SEV|SNP|AMD-Vi' | tail -n 20 # may need root
Sources
- The author's own study notes on confidential computing, written from AMD's public documents (not published), sections 9 to 13 and examples E41 to E55, and its source register: AMD 56860, the Linux RMPOPT patch series, Linux, UEFI and NIST IR 8320. The RMP Dirty (RMPCHKD) description follows AMD 69203, revision 1.00. The RMPOPT field names follow the Linux RMPOPT patch series and the author's study notes (not yet checked against AMD documents).
- AMD 48882 rev 3.11 §2.13 (CXL), §2.14.6.
- AMD, SEV-SNP white paper (2020): threat model, restricted injection.
- Linux kernel documentation: Intel TDX, Arm CCA.