ATS and PRI Path

ATS and PRI

Ask once, remember the answer.

Every address a device uses must be translated by the IOMMU. With ATS (Address Translation Services) the card asks once and keeps the answer in its own cache, the ATC. PRI (Page Request Interface) covers a page that is not in RAM yet: the card asks the OS to get it ready. Scroll, or change the case below.

The AMD IOMMU spec defines the commands, logs and device-table bits used here. The PCIe packet layouts (TLP fields, message codes, completion bits) come from PCIe's own ATS and PRI definitions, not that spec: check them there. Terms: the DTE (Device Table Entry) holds a device's IOMMU settings, a PASID (Process Address Space ID) names one process's addresses. AMD's spec calls the card's ATC its IOTLB (hence DTE[I] and INVALIDATE_IOTLB_PAGES); the IOMMU's own cache is its translation cache. Simplified: PASID cases assume the DTE has GV=1 (guest translation on), and 00:01.1 stands in for the IOMMU's own PCI function.