// Independent synthetic policy model. No PCI configuration or DMA access occurs.
#include <cstdint>
#include <iostream>
#include <string_view>

constexpr std::uint16_t bus_master = 1u << 2; // PCI Command register bit.

struct Device {
    std::uint16_t command = 0;
    bool mapping_ready = false; // Abstract mapping and lifetime precondition.
    std::uint64_t dma_mask = 0xffffffffULL;
};

// Validates this model's policy, not all conditions required by real hardware.
std::string_view validate(const Device& d, std::uint64_t address, std::uint64_t size)
{
    if (!(d.command & bus_master)) {
        return "bus mastering disabled";
    }
    if (!d.mapping_ready) {
        return "mapping unavailable";
    }
    if (!size) {
        return "empty transfer";
    }
    // Subtraction avoids overflow in address + size - 1.
    if (address > d.dma_mask || size - 1 > d.dma_mask - address) {
        return "DMA range exceeds mask";
    }
    return "ready in model";
}

int main()
{
    Device d;
    int failures = 0;
    auto check = [&](std::string_view got, std::string_view expected, const char* name) {
        bool ok = got == expected;
        std::cout << (ok ? "PASS " : "FAIL ") << name << " : " << got << '\n';
        failures += !ok;
    };
    check(validate(d, 0x1000, 4096), "bus mastering disabled", "initial state");
    d.command |= bus_master; // Synthetic read-modify-write; preserves other bits.
    check(validate(d, 0x1000, 4096), "mapping unavailable", "enable alone is insufficient");
    d.mapping_ready = true;
    check(validate(d, 0x1000, 4096), "ready in model", "valid range");
    check(validate(d, 0xffffffff, 1), "ready in model", "last address");
    check(validate(d, 0xffffffff, 2), "DMA range exceeds mask", "crossing mask boundary");
    check(validate(d, 0, 0), "empty transfer", "zero length");
    check(validate(d, ~0ULL, 2), "DMA range exceeds mask", "overflowing range");
    d.mapping_ready = false;
    check(validate(d, 0x1000, 4096), "mapping unavailable", "mapping revoked");
    return failures ? 1 : 0;
}